Solder joint reliability in drop test is crucial for handheld systems, such as mobile phone, digital camera, and MP3 player. In recent years, a lot of experiments and simulations have been carried out by researchers to study board level drop test, and many useful results have been obtained. Regarding mechanical simulation and analysis, there are still two challenges: How to design drop test printed circuit board (PCB) based on dynamic simulation and analysis? How to get accurate elastic modulus of PCB, especially damping parameters, as property inputs for drop test simulation? In this study, an approach based on systematic modal tests and analyses is used to address these two challenges. First, modal dynamic simulation is used to design the test board to meet drop test requirements. Second, modal tests are conducted on drop test board in order to validate dynamic simulation and measure structural damping parameters and overall board elastic modulus as well. Adopted directly in drop test simulation, the measured damping parameters and elastic modulus are proved to be accurate. It is verified through comparison between the finite element simulation and real drop test results. With the modal tests and simulation method established here, drop simulation becomes very simple and accurate, and test board design and characterization are also simplified. Thus, considerable drop test experiment and simulation fine tune, and validation work can be saved.

1.
Zhu
,
L. P.
, and
Marcinkiewicz
,
W.
, 2004, “
Drop Impact Reliability Analysis of CSP Packages at Board and Product System Levels Through Modeling Approaches
,”
Proceedings of the Inter Society Conference on Thermal Phenomena
, pp.
296
303
.
2.
Zhu
,
L. P.
, 2003, “
Modeling Technique for Reliability Assessment of Portable Electronic Product Subjected to Drop Impact Loads
,”
Proceedings of the 53rd Electronic Components and Technology Conference (ECTC)
,
New Orleans, LA
, pp.
100
104
.
3.
Lim
,
C. T.
, and
Low
,
Y. J.
, 2002, “
Investigating the Drop Impact of Portable Electronic Products
,”
Proceedings of the 52nd Electronic Components and Technology Conference (ECTC)
,
San Diego, CA
, pp.
1270
1274
.
4.
Lim
,
C. T.
, and
Ang
,
C. W.
, 2003, “
Drop Impact Survey of Portable Electronic Products
,”
Proceedings of the 53rd Electronic Components and Technology Conference (ECTC)
,
New Orleans, LA
, pp.
113
120
.
5.
Tee
,
T. Y.
,
Ng
,
H. S.
,
Lim
,
C. T.
,
Pek
,
E.
, and
Zhong
,
Z. W.
, 2004, “
Impact Life Prediction Modeling of TFBGA Packages Under Board Level Drop Test
,”
Microelectron. Reliab.
0026-2714,
44
(
7
), pp.
1131
1142
.
6.
Chong
,
D. Y. R.
,
Che
,
F. X.
,
Pang
,
J. H. L.
,
Ng
,
K.
,
Tan
,
J. Y. N.
, and
Low
,
P. T. H.
, 2006, “
Drop Impact Reliability Testing for Lead-Based Soldered IC Packages
,”
Microelectron. Reliab.
0026-2714,
46
(
7
), pp.
1160
1171
.
7.
Goyal
,
S.
, and
Buratynski
,
E. K.
, 2000, “
Methods for Realistic Drop-Testing
,”
Int. J. Microcircuits Electron. Packag.
1063-1674,
23
, pp.
45
52
.
8.
2003, “
Board Level Drop Test Method of Components for Handheld Electronic Products
.” JEDEC Standard JESD22-B111.
9.
Lim
,
C. T.
,
Teo
,
Y. M.
, and
Shim
,
V. P. W.
, 2002, “
Numerical Simulation of the Drop Impact Response of a Portable Electronic Product
,”
IEEE Trans. Compon. Packag. Technol.
1521-3331,
25
(
3
), pp.
478
485
.
10.
Yu
,
Q.
,
Kikuchi
,
H.
,
Ikeda
,
S.
,
Shiratori
,
M.
,
Kakino
,
M.
, and
Fujiwara
,
N.
, 2002, “
Dynamic Behavior of Electronics Package and Impact Reliability of BGA Solder Joints
,”
Proceedings of Inter Society Conference on Thermal Phenomena
, pp.
953
960
.
11.
Tee
,
T. Y.
,
Luan
,
J.
,
Pek
,
E.
,
Lim
,
C. T.
, and
Zhong
,
Z. W.
, 2004, “
Advanced Experimental and Simulation Techniques for Analysis of Dynamic Responses During Drop Impact
,”
Proceedings of the 54th Electronic Components and Technology Conference (ECTC)
,
Las Vegas, NV
, pp.
1088
1094
.
12.
Ren
,
W.
,
Wang
,
J. J.
, and
Reinikainen
,
T.
, 2004, “
Application of ABAQUS/Explicit Submodeling Technique in Drop Simulation of System Assembly
,”
Proceedings of the Sixth Electronics Packaging Technology Conference (EPTC)
,
Singapore
, pp.
541
546
.
13.
Zhao
,
J. F.
, and
Garner
,
L. J.
, 2006, “
Mechanical Modeling and Analysis of Board Level Drop Test of Electronic Package
,”
Proceedings of the 56th Electronic Components and Technology Conference (ECTC)
,
San Diego, CA
, pp.
436
442
.
14.
Lall
,
P.
,
Gupte
,
S.
,
Choudhary
,
P.
, and
Suhling
,
J.
, 2007, “
Solder Joint Reliability in Electronics Under Shock and Vibration Using Explicit Finite-Element Submodeling
,”
IEEE Trans. Electron. Packag. Manuf.
1521-334X,
30
(
1
), pp.
74
83
.
15.
Syed
,
A.
,
Kim
,
S. M.
,
Lin
,
W.
,
Kim
,
J. Y.
,
Sohn
,
E. S.
, and
Shin
,
J. H.
, 2007, “
A Methodology for Drop Performance Prediction and Application for Design Optimization of Chip Scale Packages
,”
IEEE Trans. Electron. Packag. Manuf.
1521-334X,
30
(
1
), pp.
42
48
.
16.
Tsai
,
T. Y.
,
Yeh
,
C. L.
,
Lai
,
Y. S.
, and
Chen
,
R. S.
, 2007, “
Transient Submodeling Analysis for Board-Level Drop Tests of Electronic Packages
.”
IEEE Trans. Electron. Packag. Manuf.
1521-334X,
30
(
1
), pp.
54
62
.
17.
Wang
,
Y. Q.
,
Low
,
K. H.
,
Che
,
F. X.
,
Pang
,
H. L. J.
, and
Yeo
,
S. P.
, 2003, “
Modeling and Simulation of Printed Circuit Board Drop Test
,”
Proceedings of the Fifth Electronics Packaging Technology Conference (EPTC)
,
Singapore
, pp.
263
268
.
18.
Yang
,
Q. J.
,
Lim
,
G. H.
,
Lin
,
R. M.
,
Yap
,
F. F.
,
Pang
,
H. L. J.
, and
Wang
,
Z. P.
, 1997, “
Experimental Modal Analysis of PBGA Printed Circuit Board Assemblies
,”
Proceedings of the First Electronic Packaging Technology Conference (EPTC)
, pp.
290
296
.
19.
Zhao
,
J. F.
,
Liu
,
F.
,
Zhou
,
X.
,
Zhou
,
H. T.
,
Jing
,
J. P.
, and
Zhao
,
M.
, 2007, “
Improvement of JEDEC Drop Test in SJR Qualification Through Alternative Test Board Design
,”
Proceedings of the 57th Electronic Components and Technology Conference (ECTC)
,
Reno, NV
, pp.
946
955
.
20.
2001, “
Mechanical Shock
,” JEDEC Standard JESD22-B104-B.
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