Research Papers

Multidevice Cooling With Flow Boiling in a Variable Microgap

[+] Author and Article Information
S. J. Young

General Dynamics Mission Systems,
Bloomington, MN 55431

D. Janssen, E. A. Wenzel, B. M. Shadakofsky

Department of Mechanical Engineering,
University of Minnesota,
Minneapolis, MN 55455

F. A. Kulacki

Department of Mechanical Engineering,
University of Minnesota,
Minneapolis, MN 55455
e-mail: kulacki@umn.edu

1Corresponding author.

Contributed by the Heat Transfer Division of ASME for publication in the JOURNAL OF THERMAL SCIENCE AND ENGINEERING APPLICATIONS. Manuscript received February 24, 2018; final manuscript received June 20, 2018; published online August 31, 2018. Assoc. Editor: Pedro Mago.

J. Thermal Sci. Eng. Appl 10(6), 061014 (Aug 31, 2018) (8 pages) Paper No: TSEA-18-1104; doi: 10.1115/1.4040965 History: Received February 24, 2018; Revised June 20, 2018

Flow boiling in an onboard variable microgap is demonstrated as a viable cooling method for multidevice electronics. The microgap is created by a bonded conformal encapsulation that delivers uniform subcooled inlet coolant flow across a multidevice layout comprising a processor and two in-line, symmetrically placed memory devices. Each device is simulated with a ceramic resistance heater on a 1:1 scale, and the heights of the devices create the variable microgap under the roof line of the encapsulation. The gap height for the processor is 0.5 mm and 1 mm for the memory devices. Parameters investigated are pressure drop, average device temperature, processor power, and coefficient of performance (COP). For inlet coolant flow first over the memory devices, the average device temperature exceeds the 95 °C limit when processor power is ∼50 W or less. For inlet flow over the processor, memory device temperatures are approximately the same over all the levels of processor and memory chip power. For processor power <30 W and an inlet coolant temperature of 25 °C, single-phase heat transfer is the dominant cooling mechanism. When processor power is >40 W, two-phase heat transfer dominates, and processor power of 120 W is reached within the 95 °C threshold. Volumetric power density across the data set is 134 to 1209 W/cm3.

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Bar-Cohen, A. , and Rahim, E. , 2009, “ Modeling and Prediction of Two-Phase Microgap Channel Heat Transfer Characteristics,” Heat Transfer Eng., 30(8), pp. 601–625. [CrossRef]
Alam, T. , Lee, P. S. , and Jin, L.-W. , 2014, “ Flow Boiling in Microgap Channels,” Thermal Engineering and Applied Science (SpringerBriefs), Springer, New York.
Janssen, D. D. , Dixon, J. M. , Young, S. J. , and Kulacki, F. A. , 2013, “ Flow Boiling in Short Narrow Gap Channels,” Summer Heat Transfer Conference, ASME Paper No. 2013HT-17437.
Janssen, D. , Dixon, J. M. , Young, S. J. , and Kulacki, F. A. , 2015, “ Cooling Multiple in Line Chip Pairs Via Flow Boiling,” ASME J. Heat Transfer, 137(11), p. 111501. [CrossRef]
Young, S. J. , Janssen, D. , Wenzel, E. A. , Shadakofsky, B. M. , and Kulacki, F. A. , 2018, “ Thermal Management Via Direct Liquid Cooling and Onboard Microgap Encapsulation,” ASME J. Therm. Sci. Eng. Appl., 10(2), p. 021002. [CrossRef]
Solovitz, S. A. , and Mainka, J. , 2011, “ Manifold Design for Micro-Channel Cooling With Uniform Flow Distribution,” ASME J. Fluids Eng., 133(5), p. 051103. [CrossRef]
Young, S. J. , Kulacki, F. A. , Janssen, D. , Shadakofsky, B. M. , and Wenzel, E. A. , 2015, “ Conformal Encapsulation Cooling (CECT),” Final Report, DARPA/MTO/AFRL, Arlington, TX, Report No. FA8650-14-C-7460.


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Fig. 1

Conformal encapsulation for multidevice configuration. Inlet and outlet plenums with manifolds directed coolant across the device layout. The flat roofline represents a generic form. Memory chips are represented by the small rectangle on solder-ball base, and the processor is represented by the large rectangle on solder-ball base. Coolant flow can be in either direction through plenums to the left or right side of the encapsulation.

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Fig. 2

Device (chip) layout under the encapsulation. The 8 × 8 mm heaters represent memory devices (chips), and the 12 × 12 mm heater represents the processor (chip).

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Fig. 3

Encapsulation of multichip layout. (a) Overall flow platform with flow splitter between the two secondary chips. (b) Cut-away view of channelized inlet and outlet manifolds and plenums. (c) Assembly above base.

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Fig. 4

Flow management system

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Fig. 5

Pressure drop for inlet flow over the memory (small) chips (flow direction 1). Encapsulation is ABS.

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Fig. 6

Pressure drop for inlet flow over processor (main) chip (flow direction 2). Encapsulation is ABS.

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Fig. 7

Processor temperature for inlet flow over memory chips first (flow direction 1). Encapsulation is ABS.

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Fig. 8

Processor temperature for inlet flow over processor first (flow direction 2). Encapsulation is ABS.



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