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Research Papers

Energy-Efficient Cooling of Liquid-Cooled Electronics Having Temperature-Dependent Leakage

[+] Author and Article Information
Shawn A. Hall

e-mail: sahall@us.ibm.com

Gerard V. Kopcsay

e-mail: kopcsay@us.ibm.com
IBM T. J. Watson Research Center,
Yorktown Heights, NY 10598

Manuscript received February 10, 2012; final manuscript received May 13, 2013; published online October 25, 2013. Assoc. Editor: Ravi Prasher.

J. Thermal Sci. Eng. Appl 6(1), 011008 (Oct 25, 2013) (12 pages) Paper No: TSEA-12-1023; doi: 10.1115/1.4024843 History: Received February 10, 2012; Revised May 13, 2013

Energy conservation in data centers with liquid-cooled electronics is considered, taking into account the combined power consumption of both the electronics and the associated cooling equipment, particularly chillers. The energy-saving technique called “free cooling,” which is most effective at minimizing or eliminating the need for chillers when the temperature of the coolant delivered to the electronics is high, is shown to be at odds with the electronics itself, because of subthreshold leakage in complementary metal-oxide semiconductor (CMOS) transistors, which is minimized when coolant temperature is low. A mathematical model is developed to investigate this trade-off, to discover what liquid-coolant temperature is optimal overall, and thereby to determine what combination of free cooling and traditional chiller cooling should be used for minimal overall power consumption. As an example of how to apply the mathematical model, parameters are chosen in accordance with experimental measurements on an early prototype of a state-of-the-art, water-cooled computer (International Business Machines's (IBM) BlueGene/Q). Results for total data-center power (computer + cooling equipment) are obtained as a function of coolant temperature, the computational state of the computer (which affects CMOS leakage), and weather (which affects the ability to employ free cooling). For the type of system considered, the optimal coolant temperature is found to be a discontinuous function of the other parameters, and traditional chiller cooling is found sometimes to be more energy efficient than free cooling.

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References

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Leakage in CMOS Nanometer Technologies, previously cited as Ref. [2], Figs. 1–9, p. 11.

Figures

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Fig. 1

Data-center cooling

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Fig. 2

Experimental determination of parameters for a prototype of BlueGene/Q (uninitialized state)

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Fig. 3

Exponential parameter κ versus CMOS Gate length

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Fig. 4

Parameter summary for three measured computational states of the prototype BlueGene/Q subsystem

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Fig. 5

Subthreshold power fraction versus junction temperature (for prototype BlueGene/Q processing chips)

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Fig. 6

Total power versus inlet coolant temperature and computational state, for T3≤12°CC

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Fig. 7

Total power versus inlet coolant temperature and computational state, for T3=18°CC

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Fig. 8

Total power versus inlet coolant temperature and computational state, for T3=24°CC

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Fig. 9

Total power versus inlet coolant temperature and computational state, for T3=30°CC

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Fig. 10

Total power versus inlet coolant temperature and computational state, for T3=36°CC

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Fig. 11

Optimum coolant temperature T0* versus, T3andλ and λ, showing downshift locations

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Fig. 12

Downshift boundary

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Fig. 13

How does the downshift boundary depend on parameters?

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Fig. 14

Downshift boundary versus CMOS exponent κ

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Fig. 15

Downshift boundary versus thermal impedance ℜ¯

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Fig. 16

Downshift boundary versus heat-exchanger figure of merit UA

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Fig. 17

Downshift boundary versus chiller-overhead fraction α

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