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Research Papers

Efficient Thermal-Impedance Simulation of Insulated-Gate Bipolar Transistors Modules on Heat Sinks

[+] Author and Article Information
Thomas B. Gradinger

e-mail: thomas.gradinger@ch.abb.com

Uwe Drofenik

e-mail: uwe.drofenik@ch.abb.com
ABB Switzerland Ltd.,
Corporate Research,
Segelhofstrasse 1K,
Baden-Dättwil 5405, Switzerland

1Corresponding author.

Manuscript received August 7, 2012; final manuscript received February 8, 2013; published online October 3, 2013. Assoc. Editor: Mehmet Arik.

J. Thermal Sci. Eng. Appl 5(4), 041009 (Oct 03, 2013) (11 pages) Paper No: TSEA-12-1128; doi: 10.1115/1.4023889 History: Received August 07, 2012; Revised February 08, 2013

The prediction of temperatures in power semiconductor modules, such as insulated-gate bipolar transistors (IGBTs) is critical to ensure adequate lifetime modeling of the devices. A temperature of particular interest is that of the semiconductor junction, which is used to assess the lift-off of wire bonds. For many applications featuring dynamic loads, the junction temperature needs to be simulated for so-called mission profiles of significant duration. To limit the computational expense, the simulations are based on thermal impedances from junction to ambient, which may be obtained from numerical 3-d simulations. Even these 3-d simulations can be computationally expensive. In power-electronic systems, often, large heat sinks are used with a multitude of mounted IGBT modules, interacting thermally. In such cases, the detailed 3-d models become large and the transient simulations are not feasible. In the present work, a method is proposed that allows us to significantly reduce the 3-d model size. To this end, the ideas of compact or boundary-condition-independent models are used. The presented method has the advantage that, unlike in model-order reduction, the system matrices of the 3-d model are not needed. This makes the method applicable to commercial simulation software like ANSYS Icepak™, that does not give access to the system matrices. The method is implemented via MATLAB™ scripts that automatically generate 3-d ANSYS Icepak™ models of IGBT modules on a heat sink. An example case of two IGBT modules mounted on an air-cooled heat sink is presented, and the method is shown to yield good accuracy (thermal-impedance errors below 8% and thermal-resistance errors close to zero), while reducing the model's mesh size by the factor of 14. Further error reduction is expected to be possible by adapting the model parameters. This can be subject to future work.

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References

Bates, J. J., and Tustin, A., 1956, “Temperature Rises in Electrical Machines as Related to the Properties of Thermal Networks,” Power Eng. Proc. IEEE - Part A, 103(11), pp. 471–482. [CrossRef]
Stewart, W. A., 1969, “Cooling of Distribution Transformers In Vented Underground Vaults,” IEEE Trans. Power Apparatus Syst., PAS-88(6), pp. 843–853. [CrossRef]
Escribano, L. M., Prieto, R., Oliver, J. A., Cobos, J. A., and Uceda, J., 2003, “Analytical Thermal Model for Magnetic Components,” Proceedings of the 34th Annual IEEE Power Electronics Specialist Conference (PESC 2003), Acapulco, Mexico, June 13–19, Vol. 2, pp. 861–866.
Weedy, B. M., 1972, “Effects of Environment on Transient Thermal Performance of Underground Cables,” Proc. IEE, 119(2), pp. 225–230. [CrossRef]
Schoenemann, T., Pleines, M., Schenk, M., Lobl, H., and Magier, T., 2004, “Optimal Design of Generator Circuit Breakers Up to a Capacity of 2000 Mva Using Thermal Models,” Proceedings of the 50th IEEE Holm Conference on Electrical Contacts and the 22nd International Conference on Electrical Contacts, Seattle, WA, Sep. 20–24, pp. 111–117.
Szekely, V., and Tarnay, K., 1972, “Accurate Algorithm for Temperature Calculation of Devices in Nonlinear Circuit-Analysis Programs,” Electron. Lett., 8(19), pp. 470–472. [CrossRef]
Nemeth, K., 1976, “On the Analysis of Nonlinear Resistive Networks Considering the Effect of Temperature,” IEEE J. Solid-State Circuits, 11(4), pp. 550–552. [CrossRef]
Vogelsong, R. S., and Brzezinski, C., 1989, “Simulation of Thermal Effects in Electrical Systems,” Proceedings of the Fourth Annual IEEE Applied Power Electronics Conference and Exposition (APEC 1989), Baltimore, MD, March 13–17, pp. 353–356.
le Jannou, J. P., and Huon, Y., 1991, “Representation of Thermal Behavior of Electronic Components for the Creation of a Databank,” IEEE Trans. Compon., Hybrids, Manuf. Technol., 14(2), pp. 366–373. [CrossRef]
Latif, M., and Bryant, P. R., 1982, “Network Analysis Approach to Multidimensional Modeling of Transistors Including Thermal Effects,” IEEE Trans. Comput.-Aided Des., 1(2), pp. 94–101. [CrossRef]
Hefner, A. R., and Blackburn, D. L., 1992, “Simulating the Dynamic Electro-Thermal Behavior of Power Electronic Circuits and Systems,” IEEE Workshop on Computers in Power Electronics, Berkeley, CA, August 9–11, pp. 143–151.
Kurimoto, K., Yamashita, K., Miyanaga, I., Hori, A., and Odanaka, S., 1994, “An ElectroThermal Circuit Simulation Using an Equivalent Thermal Network for Electrostatic Discharge,” Digest of Technical Papers of the Symposium on VLSI Technology, Honolulu, HI, June 7–9, pp. 127–128.
Hefner, A. R., and Blackburn, D. L., 1994, “Thermal Component Models for Electrothermal Network Simulation,” IEEE Trans. Compon., Packag., Manuf. Technol., Part A, 17(3), pp. 413–424. [CrossRef]
Ishizuka, M., Hisano, K., Sasaki, T., and Fukuoka, Y., 1995, “Application of the Thermal Network Method to the Transient Thermal Analysis of Multichip Modules,” Proceedings of the 18th IEEE/CPMT International Electronic Manufacturing Technology Symposium, Omiya, Japan, Dec. 4–6, pp. 464–467.
Drofenik, U., Kovacevic, I., Schmidt, R., and Kolar, J. W., 2008, “Multi-Domain Simulation of Transient Junction Temperatures and Resulting Stress-Strain Behavior of Power Switches for Long-Term Mission Profiles,” Proceedings of the 11th Workshop on Control and Modeling for Power Electronics (COMPEL 2008), Zurich, Switzerland, Aug. 17–20, pp. 1–7.
Bin, D., Hudgins, J. L., Santi, E., Bryant, A. T., Palmer, P. R., and Mantooth, H. A., 2010, “Transient Electrothermal Simulation of Power Semiconductor Devices,” IEEE Trans. Power Electron., 25(1), pp. 237–248. [CrossRef]
Lee, J. H., and Cho, B. H., 2003, “Large Time-Scale Electro-Thermal Simulation for Loss and Thermal Management of Power MOSFET,” Proceedings of the 34th Annual IEEE Power Electronics Specialist Conference (PESC 2003), Acapulco, Mexico, June 13–19, Vol. 1, pp. 112–117.
Drofenik, U., Cottet, D., Müesing, A., Meyer, J.-M., and Kolar, J. W., 2007, “Computationally Efficient Integration of Complex Thermal Multi-Chip Power Module Models Into Circuit Simulators,” Proceedings of the 4th Power Conversion Conference (PCC’07), Nagoya, Japan, April 2–5.
Drofenik, U., and Kolar, J. W., 2005, “A General Scheme for Calculating Switching- and Conduction-Losses of Power Semiconductors in Numerical Circuit Simulations of Power Electronic Systems,” Proceedings of the 2005 International Power Electronics Conference (IPEC’05), Niigata, Japan, April 4–8.
Dewei, X., Haiwei, L., Lipei, H., Azuma, S., Kimata, M., and Uchida, R., 1999, “Power Loss and Junction Temperature Analysis of Power Semiconductor Devices,” Conf. Record of the Thirty-Fourth IAS Annual Meeting and IEEE Industry Applications Conference (IAS 1999), Phoenix AZ, Oct. 3–7, Vol. 1, pp. 729–734.
Chan-Su, Y., Malberti, P., Ciappa, M., and Fichtner, W., 2001, “Thermal Component Model for Electrothermal Analysis of IGBT Module Systems,” IEEE Trans. Adv. Packaging, 24(3), pp. 401–406. [CrossRef]
Wachutka, G. K., 1990, “Rigorous Thermodynamic Treatment of Heat Generation and Conduction in Semiconductor Device Modeling,” IEEE Trans. Comput.-Aided Des., 9(11), pp. 1141–1149. [CrossRef]
Codecasa, L., 2005, “A Novel Approach for Generating Boundary Condition Independent Compact Dynamic Thermal Networks of Packages,” IEEE Trans. Compon. Packag. Technol., 28(4), pp. 593–604. [CrossRef]
Bar-Cohen, A., and Krueger, W. B., 1997, “Thermal Characterization of Chip Packages-Evolutionary Development of Compact Models,” Proceedings of the Thirteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM XIII), Austin, TX, Jan. 28–30, pp. 180–197.
Lasance, C. J. M., 1997, “Thermal Characterization of Electronic Parts With Compact Models: Interpretation, Application, and the Need for a Paradigm Shift,” Proceedings of the Thirteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM XIII), Austin, TX, Jan. 28–30, pp. 40–48.
Vinke, H., and Lasance, C. J. M., 1997, “Compact Models for Accurate Thermal Characterization of Electronic Parts,” IEEE Trans. Compon., Packag., Manuf. Technol., Part A, 20(4), pp. 411–419. [CrossRef]
Ortega, A., Aranyosi, A., Griffin, R. A., West, S., and Edwards, D., 1999, “Compact Thermal Models of Conduction Cooled Packages,” Proceedings of the Fifteenth Annual IEEE Semiconductor Thermal Measurement and Management Symposium, San Diego, CA, March 9–11, pp. 221–230.
Lei, S., Kuchta, D., and Young, K., 2003, “A Method of Multi-Node Thermal Network Extraction for Spice Compatible Simulations,” Proceedings of the 53rd Electronic Components and Technology Conference, New Orleans, LA, May 27–29, pp. 1631–1635.
Drofenik, U., Cottet, D., Müsing, A., Meyer, J.-M., and Kolar, J. W., 2007, “Modelling the Thermal Coupling Between Internal Power Semiconductor Dies of A Water-Cooled 3300V/1200A Hipak IGBT Module,” Proceedings of the Conference for Power Electronics, Intelligent Motion, Power Quality (PCIM’07), Nuremberg, Germany, May 22–24.
Reichl, J., Berning, D., Hefner, A., and Lai, J.-S., 2004, “Six-Pack IGBT Dynamic Electro-Thermal Model: Parameter Extraction and Validation,” Proceedings of the Nineteenth Annual IEEE Applied Power Electronics Conf. and Exposition (APEC 2004), Anaheim, CA, Feb. 22–26, Vol. 1, pp. 246–251.
Ortiz-Rodriguez, J. M., Hernandez-Mora, M., Duong, T. H., and Hefner, S. G. L., 2008, “Thermal Network Component Models for 10 kV SiC Power Module Packages,” Proceedings of the Power Electronics Specialists Conference (PESC 2008), Island of Rhodes, Greece, June 15–19, pp. 4770–4775.
Zhou, Z., Holland, P., and Igic, P., 2008, “Compact Thermal Model of a Three-Phase IGBT Inverter Power Module,” Proceedings of the 26th International Conference on Microelectronics, (MIEL 2008), Nis, Serbia, May 11–14, pp. 167–170.
Gradinger, T., and Riedel, G., 2012, “Thermal Network for Time-Variant Cooling System: Modeling Approach and Accuracy Requirements for Lifetime Prediction,” Proceedings of the 7th International Conference on Integrated Power Electronic Systems (CIPS), Nuremberg/Germany, March 6–8.
ABB, 2011, ABB Data Sheet, Doc. No. 5SYA 1407-03 04-2011, 5SNA 1500E330305 ABB HiPakTM, IGBT Module, Nov. 5, http://www.abb.com
Bechtold, T., Rudnyi, E. B., and Korvink, J. G., 2007, Fast Simulation of Electro-Thermal MEMS, Springer, Berlin.
Sabry, M.-N., 2003, “Dynamic Compact Thermal Models Used for Electronic Design: A Review of Recent Progress,” International Electronic Packaging Technical Conference and Exhibition, Maui, HI, July 6–11.
Gerstenmaier, Y. C., and Wachutka, G., 2002, “Rigorous Model and Network for Transient Thermal Problems,” Microelectron. J., 33, pp. 719–725. [CrossRef]
Bhatti, M. S., and Shah, R. K., 1987, “Turbulent and Transition Flow Convective Heat Transfer in Ducts,” Handbook of Single-Phase Convective Heat Transfer, S.Kakac, R. K.Shah, and W.Aung, eds., John Wiley & Sons, New York.
Gradinger, T., and Liu, Y., 2010, “Fast and Accurate Simulation of Time-Variant Air-Cooling Systems,” Proceedings of the 6th International Conference on Integrated Power Electronic Systems (CIPS), Nuremberg, Germany, March 16–18.

Figures

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Fig. 1

Heat sink with 8 IGBT modules, e.g., S1–6 belonging to an inverter, and S7–8 belonging to a braking chopper. Slice of half-module width shaded gray.

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Fig. 2

Example case of 2 HiPak™ IGBT modules on a heat sink, corresponding to the slice shaded gray in Fig. 1

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Fig. 3

Detailed Icepak™ model of the case shown in Fig. 2. Computational mesh, cross-sectional view in the z-direction.

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Fig. 4

Detailed Icepak™ model of the case shown in Fig. 2. Computational mesh, cross-sectional view of half an IGBT module in the y-direction.

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Fig. 5

Simulation process

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Fig. 6

IGBT-module geometry, top view. Left half corresponding to each of the two module halves on the heat sink in Fig. 2. Block-model segmentation shown for the lower left quadrant. Squares within shaded areas show sources of detailed Icepak™ model. Faces 10, 14, and 27 numbered for later reference. Hatched face in lower-right corner is set to elevated temperature to check time step influence (Sec. 5.1).

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Fig. 7

Flow networks modeling cooling-air flow in Icepak™

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Fig. 8

Simplified Icepak™ model of the case shown in Fig. 2, using block models for the IGBT modules. Computational mesh, cross-sectional view in the z-direction.

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Fig. 9

Simplified Icepak™ model of the case shown in Fig. 2, using block models for the IGBT modules. Computational mesh, cross-sectional view of half an IGBT module in the y-direction.

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Fig. 10

Comparison of Zth(j-a) from detailed model on heat sink. “Direct” = determination from monitor points. “Via convolution” = determination via Eq. (2).

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Fig. 11

Normalized error of Zth(j-a) obtained via convolution in Fig. 10 (≡(Zvia conv.-Zdirect)/Zdirect)

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Fig. 12

Comparison of qmk(t) between block model and detailed Icepak™ model. Examples for faces k = 10 and 14, for IGBTs and diodes heated.

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Fig. 13

Comparison of Gik(t) between block model and detailed Icepak™ model. Examples for faces 10, 14, and 27. For the detailed model, the curves Gik and Gki overlap.

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Fig. 14

Zth(j-a) for IGBTs, diodes and cross-talk (“IGBT to diode” meaning “IGBTs heated, diodes measured”): comparison of detailed Icepak™ model and block model

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Fig. 15

Normalized error in Zth(j-a) of block model ((Zblock-Zdetail)/Zdetail) for IGBTs, diodes, and cross-talk (“IGBT to diode” meaning “IGBTs heated, diodes measured”): comparison of detailed Icepak™ model and block model

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